Design Technology Lab

DT LAB   →  M.S. Candidates   →  Yoonsang Song (송윤상)

Yoonsang Song (송윤상)

M.S. candidate, School of EE, KAIST
  • location
    291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
  • Office
    School of Electrical Engineering (E3-2), 5219

Education

  • KAIST, School of Electrical Engineering M.S. (Sep. 2022 – Present)
  • Purdue University, School of Electrical and Computer Engineering B.S. (Aug. 2015 – Dec. 2020)
  • Seoul High School (Mar. 2011 – Feb. 2014)

Honors

Research Interests

  • Machine learning for EDA
  • Clock tree synthesis

Publications

Journal Papers

Conference Papers

  1. Yoonsang Song, Gangmin Cho, Wonjae Lee, and Youngsoo Shin, “Simultaneous clock wire sizing and shield insertion for minimizing routing blockage,” Proc. Workshop on Machine Learning for CAD (MLCAD), Sep. 2023.
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