Design Technology Lab

DT LAB   →  Ph.D. Candidates   →  Wonjae Lee (이원재)

Wonjae Lee (이원재)

Ph.D. candidate, School of EE, KAIST
  • location
    291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
  • Office
    School of Electrical Engineering (E3-2), 5219

Education

  • KAIST, School of Electrical Engineering Ph.D. (Sep. 2020 – Present)
  • KAIST, School of Electrical Engineering M.S. (Sep. 2018 – Aug. 2020)
  • KAIST, School of Electrical Engineering B.S. (Mar. 2014 – Aug. 2018)
  • Sangsan High School (Mar. 2011 – Feb. 2014)

Research Interests

  • Design automation

Honors

  1. Young Fellow Award @ 58th DAC (Dec. 2021)

Publications

Journal Papers

  1. Daijoon Hyun, Wonjae Lee, Jinhyeong Park, and Youngsoo Shin, “Integrated power distribution network synthesis for mixed macro blocks and standard cells,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, issue 6, pp. 2211-2215, June 2023.

Conference Papers

  1. Seunggyu Lee, Wonjae Lee, and Youngsoo Shin, “Integrated netlist synthesis and in-memory mapping for memristor-aided logic,” Proc. Great Lakes Symp. on VLSI (GLSVLSI), accepted.
  2. Wonjae Lee, Insu Cho, Gangmin Cho, and Youngsoo Shin, “Routability-driven power distribution network synthesis with IR-drop budgeting,” Proc. Workshop on Machine Learning for CAD (MLCAD), Sep. 2023.
  3. Yoonsang Song, Gangmin Cho, Wonjae Lee, and Youngsoo Shin, “Simultaneous clock wire sizing and shield insertion for minimizing routing blockage,” Proc. Workshop on Machine Learning for CAD (MLCAD), Sep. 2023.
  4. Wonjae Lee, Yonghwi Kwon, and Youngsoo Shin, “Fast ECO leakage optimization using graph convolutional network,” Proc. Great Lakes Symp. on VLSI (GLSVLSI), Sep. 2020. (Best Paper Award Candidate)
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