Design Technology Lab

Wonjae Lee (이원재)

Ph.D. candidate, School of EE, KAIST

  • location
    291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
  • Office
    School of Electrical Engineering (E3-2), 5219


  • KAIST, School of Electrical Engineering Ph.D. (Sep. 2020 – Present)
  • KAIST, School of Electrical Engineering M.S. (Sep. 2018 – Aug. 2020)
  • KAIST, School of Electrical Engineering B.S. (Mar. 2014 – Aug. 2018)
  • Sangsan High school (Mar. 2011 – Feb. 2014)

Research Interests

  • Design automation


  1. Young Fellow Award @ 58th DAC (Dec. 2021)


Journal Papers

Conference Papers

  1. Seunggyu Lee, Gangmin Cho, Wonjae Lee, Umar Afzaal, and Youngsoo Shin, “Efficient netlist rewriting and in-memory mapping for memristor-aided logic,” Proc. Design Automation Conf. (DAC), submitted.
  2. Wonjae LeeYonghwi Kwon, and Youngsoo Shin, “Fast ECO leakage optimization using graph convolutional network,” Proc. Great Lakes Symp. on VLSI (GLSVLSI), Sep. 2020. (Best Paper Award Candidate)