Wachirawit Ponghiran (Mint)
Ph.D. candidate, Purdue University
Last updateAugust 12, 2021
- KAIST, School of Electrical Engineering M.S. (Aug. 2015 – Aug. 2017)
- KAIST, School of Electrical Engineering B.S. (Aug. 2011 – Aug. 2015)
- Mahidol Wittayanusorn School, Thailand (Mar. 2009 – Mar. 2011)
- Clock tree synthesis and optimization
- Design for manufacturability (DFM)
- Low-power design
- Daijoon Hyun, Wachirawit Ponghiran, and Youngsoo Shin, “Clock tree optimization through selective airgap insertion,” Proc. Int’l Symp. on Quality Electronic Design (ISQED), Mar. 2017.
- Wachirawit Ponghiran, Seongbo Shim, and Youngsoo Shin, “Cut mask optimization for multi-patterning directed self-assembly lithography,” Proc. Design, Automation & Test in Europe (DATE), pp. 1498-1503, Mar. 2017.