Design Technology Lab

Taeyoung Kim (김태영)

M.S. candidate, School of EE, KAIST

  • location
    291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
  • Office
    School of Electrical Engineering (E3-2), 5219


  • KAIST, School of Electrical Engineering M.S. (Sep. 2021 – Present)
  • Korea University, School of Electrical Engineering B.S. (Mar. 2015 – Aug. 2021)
  • Incheon Science High school (Mar. 2013 – Feb. 2015)


Design methodology for advanced technology,  GPU acceleration for CAD algorithm

Research Interests


Journal Papers

  1. Daijoon Hyun, Sunwha Koh, Younggwang Jung, Taeyoung Kim, and Youngsoo Shin, “Routability optimization of extreme aspect ratio design through non-uniform placement utilization and selective flip-flop stacking,” ACM Transactions on Design Automation of Electronic Systems, in revision.

Conference Papers

  1. Gangmin Cho, Yonghwi Kwon, Taeyoung Kim, and Youngsoo Shin, “Refragmentation through machine learning classifier for fast and accurate optical proximity correction,” Proc. SPIE Advanced Lithography, Apr. 2022.