Kiwon Yoon (윤기원)
Ph.D. candidate, DT Lab., EE, KAIST
Last updateAugust 18, 2021
- KAIST, School of Electrical Engineering Ph.D. (Sep. 2016 – Present)
- KAIST, School of Electrical Engineering M.S. (Sep. 2014 – Aug. 2016)
- Yonsei University, School of Electrical Engineering B.S. (Mar. 2008 – Feb. 2014)
- Suji High School (Mar. 2005 – Feb. 2008)
Design methodology for advanced technology, GPU acceleration for CAD algorithm
- Clock tree synthesis with crosslink
- Low power design of dual-mode circuit
- Brain-inspired neuromorphic hardware
- Kiwon Yoon, Seongbo Shim, and Youngsoo Shin, “Crosslink insertion for minimizing OCV clock skew,” Proc. Int’l Symp. on Circuits and Systems (ISCAS), pp. 2587-2590, May. 2016.
- Kiwon Yoon, Suhyeong Choi, and Youngsoo Shin, “Area efficient neuromorphic circuit based on stochastic computation,” Proc. Int’l SoC Design Conf. (ISOCC), pp. 73-74, Oct. 2016.
- Kiwon Yoon, Daijoon Hyun, and Youngsoo Shin, “Fast timing analysis of non-tree clock network with shorted wires,” Proc. Great Lakes Symp. on VLSI (GLSVLSI), pp. 279-284, May. 2018.