Jingon Lee (이진곤)
Samsung Electronics
Education
- KAIST, School of Electrical Engineering M.S. (Mar. 2017 – Feb. 2019)
- KyungHee university, School of Electrical and information Engineering B.S (Mar. 2010 – Feb. 2017)
- HyoWon High School (Mar. 2007 – Feb. 2010)
Research Interests
- Circuit timing analysis
- CMOS manufacture process
Publications
Journal Papers
- Youngsoo Song, Daijoon Hyun, Jingon Lee, jinwook Jung, and Youngsoo Shin, “Cut optimization for redundant via insertion in self-aligned double patterning,” ACM Transactions on Design Automation of Electronic Systems, vol. 24, no. 6, pp. 61:1-61:21, Sep. 2019.
Conference Papers
- Jingon Lee, jinwook Jung, and Youngsoo Shin, “Fast Timing Analysis of Transistor-Level Full Custom Digital Circuits,” Proc. Int’l Symp. on Circuits and Systems (ISCAS), May. 2018.
