FAMILY

Design Technology Lab

DT LAB   →  M.S. Candidates   →  Byungho Choi (최병호)

Byungho Choi (최병호)

M.S. candidate, School of EE, KAIST
  • location
    291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
  • Office
    School of Electrical Engineering (E3-2), 5219

Education

  • KAIST, School of Electrical Engineering M.S. (Mar. 2021 – Present)
  • KAIST, School of Electrical Engineering B.S. (Mar. 2016 – Feb. 2021)
  • Daejeon Dongsin Science High School (Mar. 2014 – Feb. 2016)

Honors

Design methodology for advanced technology,  GPU acceleration for CAD algorithm

Research Interests

  • Machine learning for computational lithography

Publications

Journal Papers

Conference Papers

  1. Byungho Choi, Gangmin Cho, Yonghwi Kwon, and Youngsoo Shin, “Hotspot pattern synthesis using generative network with hotspot probability model,” Proc. SPIE Advanced Lithography, Apr. 2022.
COPYRIGHT (c) 2021. DT LAB. All rights reserved. 5219, School of Electrical Engineering (E3-2), KAIST 291 Daehak-ro, Yuseong-gu, Daejeon 34141, KOREA / Tel: +82-42-350-5479 / Fax: +82-42-350-8079 / Previous homepage: https://sites.google.com/view/kaist-shinlab