
Younggwang Jung (정영광)
Ph.D. candidate, School of EE, KAIST
- Phone
- Email
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location291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
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OfficeSchool of Electrical Engineering (E3-2), 5219
Education
- KAIST, School of Electrical Engineering Ph.D. (Mar. 2020 – Present)
- KAIST, School of Electrical Engineering M.S. (Mar. 2018 – Feb.2020)
- Ulsan National Institute of Science and Technology, School of Electrical and Computer Engineering B.S. (Mar. 2014 – Feb. 2018)
- Busan Nam High School (Mar. 2011 – Feb. 2014)
Research Interests
- Design methodology for advanced technology
- GPU acceleration for CAD algorithm
Honors
- Young Fellow Award @ 58th DAC (Dec. 2021)
- Nominated for Best Paper Award, Proc. Asia South Pacific Design Automation Conf. (ASPDAC), 2020
Publications
Journal Papers
- Daijoon Hyun, Sunwha Koh, Younggwang Jung, Taeyoung Kim, and Youngsoo Shin, “Routability optimization of extreme aspect ratio design through non-uniform placement utilization and selective flip-flop stacking,” ACM Transactions on Design Automation of Electronic Systems, in revision.
- Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, “Airgap insertion and layer reassignment under setup and hold timing constraints,” IEEE Transactions on CAD of Integrated Circuits and Systems, accepted.
- Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, “Selective use of stitch-induced via for V0 mask reduction: standard cell design and placement optimization,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E102.A, no. 12, pp. 1711-1719, Dec. 2019.
Conference Papers
- Sunwha Koh, Younggwang Jung, Daijoon Hyun, and Youngsoo Shin, “Routability optimization for extreme aspect ratio design using convolutional neural network,” Proc. Int’l Symp. on Circuits and Systems (ISCAS), May. 2021.
- Younggwang Jung, Daijoon Hyun, and Youngsoo Shin, “Integrated airgap insertion and layer reassignment for circuit timing optimization,” Proc. Asia South Pacific Design Automation Conf. (ASPDAC), pp. 32-37, Jan. 2020.