Younggwang Jung (정영광)

Ph.D. candidate, School of EE, KAIST

  • location
    291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
  • Office
    School of Electrical Engineering (E3-2), 5219

Education

  • KAIST, School of Electrical Engineering Ph.D. (Mar. 2020 – Present)
  • KAIST, School of Electrical Engineering M.S. (Mar. 2018 – Feb. 2020)
  • Ulsan National Institute of Science and Technology, School of Electrical and Computer Engineering B.S. (Mar. 2014 – Feb. 2018)
  • Busan Nam High School (Mar. 2011 – Feb. 2014)

Research Interests

  • Design methodology for advanced technology
  • GPU acceleration for CAD algorithm

Honors

  1. Young Fellow Award @ 58th DAC (Dec. 2021)
  2. Nominated for Best Paper Award, Proc. Asia South Pacific Design Automation Conf. (ASPDAC), 2020

Publications

Journal Papers

  1. Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, “Decap insertion with cell relocation minimizing IR-drop violations and routing DRVs,” IEEE Transactions on Very Large Scale Integration Systems, accepted.
  2. Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, “Accurate interpolation of library timing parameters through recurrent convolutional neural network,” IEEE Transactions on CAD of Integrated Circuits and Systems, Sep. 2023.
  3. Daijoon Hyun, Sunwha Koh, Younggwang Jung, Taeyoung Kim, and Youngsoo Shin, “Routability optimization of extreme aspect ratio design through non-uniform placement utilization and selective flip-flop stacking,” ACM Transactions on Design Automation of Electronic Systems, vol. 28, no. 4, pp. 50:1-50:19, May 2023.
  4. Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, “Airgap insertion and layer reassignment under setup and hold timing constraints,” IEEE Transactions on CAD of Integrated Circuits and Systems, vol. 42, no. 3, pp. 987-999, Mar. 2023.
  5. Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, “Selective use of stitch-induced via for V0 mask reduction: standard cell design and placement optimization,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E102.A, no. 12, pp. 1711-1719, Dec. 2019.

Conference Papers

  1. Seunggyu Lee, Daijoon Hyun, Younggwang Jung, Gangmin Cho, and Youngsoo Shin, “Fast IR-drop prediction of analog circuits using recurrent synchronous GCN and Y-net model,” Proc. Design, Automation & Test in Europe (DATE), Mar. 2024.
  2. Younggwang Jung, Daijoon Hyun, Soyoon Choi, and Youngsoo Shin, “Power distribution network optimization using HLA-GCN for routability enhancement,” Proc. Int’l Conf. on Computer-Aided Design (ICCAD), Nov. 2023.
  3. Daijoon Hyun, Younggwang Jung, Insu Cho, and Youngsoo Shin, “Decoupling capacitor insertion minimizing IR-drop violations and routing DRVs,” Proc. Asia South Pacific Design Automation Conf. (ASPDAC), Jan. 2023.
  4. Sunwha Koh, Younggwang Jung, Daijoon Hyun, and Youngsoo Shin, “Routability optimization for extreme aspect ratio design using convolutional neural network,” Proc. Int’l Symp. on Circuits and Systems (ISCAS), May. 2021.
  5. Younggwang Jung, Daijoon Hyun, and Youngsoo Shin, “Integrated airgap insertion and layer reassignment for circuit timing optimization,” Proc. Asia South Pacific Design Automation Conf. (ASPDAC), pp. 32-37, Jan. 2020. (Best Paper Award Candidate)