Younggwang Jung (정영광)
M.S. candidate, μComputing Lab., EE, KAIST

291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
Phone: +82-42-350-5479 / Fax: +82-42-351-9895
Email:  ykj0503 at

Office: NanoSoC S-204

Personal Information
  • Date of Birth:  May 03, 1995
  • Place of Birth: Busan, Korea
  • Hobbies: Photography, Playing football, Listening music
  • KAIST, School of Electrical Engineering M.S. (Mar. 2018 - Present)
  • Ulsan National Institute of Science and Technology, School of Electrical and Computer Engineering B.S. (Mar. 2014 – Feb. 2018)
  • Busan Nam High School (Mar. 2011-Feb. 2014)
Research Interests
    Design methodology for advanced technology,  GPU acceleration for CAD algorithm 

  • Journal Paper
    1. Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, "Selective use of stitch-induced via for V0 mask reduction: standard cell design and placement optimization," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, accepted for publication.
  • Conference Paper
    1. Younggwang Jung, Daijoon Hyun, and Youngsoo Shin, "Integrated airgap insertion and layer reassignment for circuit timing optimization," Proc. Asia South Pacific Design Automation Conf. (ASPDAC), Jan. 2020, accepted.