Younggwang Jung (정영광)
Ph.D. candidate, μComputing Lab., EE, KAIST

291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
Phone: +82-42-350-5479 / Fax: +82-42-351-9895
Email:  ykj0503 at

Office: NanoSoC S-204

Personal Information
  • Date of Birth:  May 03, 1995
  • Place of Birth: Busan, Korea
  • Hobbies: Photography, Playing football, Listening music


  • KAIST, School of Electrical Engineering Ph.D. (Mar. 2020 - Present)
  • KAIST, School of Electrical Engineering M.S. (Mar. 2018 - Feb.2020)
  • Ulsan National Institute of Science and Technology, School of Electrical and Computer Engineering B.S. (Mar. 2014 – Feb. 2018)
  • Busan Nam High School (Mar. 2011-Feb. 2014)

  • Nominated for Best Paper AwardProc. Asia South Pacific Design Automation Conf. (ASPDAC), 2020

Research Interests
    Design methodology for advanced technology,  GPU acceleration for CAD algorithm 

  • Journal Paper
    1. Daijoon Hyun, Younggwang Jung, and Youngsoo Shin, "Selective use of stitch-induced via for V0 mask reduction: standard cell design and placement optimization," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E102.A, no. 12, pp. 1711-1719, Dec. 2019.
  • Conference Paper
    1. Younggwang Jung, Daijoon Hyun, and Youngsoo Shin, "Integrated airgap insertion and layer reassignment for circuit timing optimization," Proc. Asia South Pacific Design Automation Conf. (ASPDAC), pp. 32-37, Jan. 2020.