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Jeongmin Hong (홍정민)
M.S. candidate, VLSI Design Technology Lab., EE, KAIST
291 Daehak-ro, Yuseong-gu, Daejeon 305-701, Korea
Phone: +82-42-350-5479 / Fax: +82-42-351-9895
Email: jmhong at ee.kaist.ac.kr
Office: NanoSoC S-204
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Personal Information
- Date of Birth: July, 16th, 1990
- Place of Birth: Jeju, Korea
- Hobbies:
Educations
- Jeju Science High School.(2006.3 ~ 2008.2)
- KAIST,Dept.of Electrical Engineering B.S.(2008.2 ~ 2013.2)
- KAIST,Dept.of Electrical Engineering M.S.(2013.2 ~ )
Research Interests
- variation tolerant design
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