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Update
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Working on optical-proximity-correction (OPC)
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Conference paper accepted to ICCAD, 2016 (정진욱)
"OWARU: free space-aware timing-driven incremental placement"
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Conference paper accepted to ISOCC, 2016 (윤기원, 최수형)
"Area efficient neuromorphic circuit based on stochastic computation"
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Conference paper accepted to ICCE, 2016 (김상민)
"Synthesis of dual-mode circuits through optimizing transition time constraints"
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The award is named to honor the memory of Dr. A. Richard Newton, a towering figure in EDA, DAC and education.
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"Redundant via insertion for multiple-patterning directed-self-assembly lithography"
SIGDA Ph.D. forum is poster session hosted by ACM SIGDA for Ph.D students to present and discuss their dissertation research with people in the EDA community
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Worked on physical retiming and latch placement & cloning
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Journal accepted to IEEE TVLSI, 2016 (심성보, 정우현)
"Lithography defect probability and its application to physical design optimization"
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Journal accepted to ACM TODAES, 2016 (김상민)
"Synthesis of dual-mode circuits through library design, gate sizing, and clock tree optimization"
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"Placement optimization for MP-DSAL compliant layout"
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Conference paper accepted to ICICDT, 2016 (한인학)
"Register grouping for synthesis of clock gating logic"
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Conference paper invited to APCCAS, 2016 (심성보, 최수형)
"Machine learning (ML)-based lithograph optimizations"
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"Crosslink insertion for minimizing OCV clock skew"
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"Directed self-assembly lithography (DSAL): mask synthesis and circuit design"
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Worked on timing driven incremental placement
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